Christian Vogel

Christian Vogel ist Leiter des Instituts für Electronic Engineering der FH JOANNEUM und FH-Professor für elektronische Systeme. Nach beruflichen Stationen am Institut für Angewandte Informationsverarbeitung und Kommunikationstechnologie, am Kompetenzzentrum Evolaris und bei Infonova BearingPoint, wo er unter anderem am Elektronischen Akt Österreich arbeitete, absolvierte er sein Doktoratsstudium an der TU Graz am Christian Doppler Labor für Nichtlineare Signalverarbeitung in Kooperation mit Infineon. Nach Forschungsaufenthalten an der Universität Linköping sowie an der ETH Zürich wurde Dr. Vogel Key Researcher am Forschungszentrum Telekommunikation Wien, wo er die Gruppe Mixed-Signal Processing leitete und für den Geschäftsbereich Verkehrstelematik verantwortlich war. Seit 2014 ist Christian Vogel an der FH JOANNEUM. Sein Forschungsinteresse liegt unter anderem in der effizienten Umsetzung von komplexen Algorithmen auf eingebettete Rechnersysteme und in deren Vernetzung und Interaktion mit der Umwelt. Er habilitierte sich im Fach „Analoge und digitale Signalverarbeitung“, veröffentlichte über 80 Fachartikel in Zeitschriften, Büchern und in Konferenztagungsbänden und ist Erfinder mehrerer internationaler Patente. Seine Arbeiten wurden mit zahlreichen Preisen, unter anderem mit dem IEEE Circuits and Systems Darlington Best Paper Award 2014, ausgezeichnet.

Projekte und DoktorandInnen
Meine Forschungsschwerpunktliegt in der Mixed-Signal Verarbeitung, wo ich Methoden aus der zeitvarianten und nichtlinearen Signalverarbeitung, der Abtasttheorie, dem maschinellen Lernen und der Optimierung verwende. Ich habe mit Analog-Digital-Wandlern, Digital-Analog-Wandlern, Phase-Locked-Loops und Leistungsverstärkern gearbeitet, wobei ich mich besonders für das Zusammenspiel von analoger und digitaler Schaltungstechnik bzw. Algorithmen und Physik interessiere, um Geräte der nächsten Generation zu entwerfen und zu verbessern. Ich bin immer an Projekten und neuen Doktoranden interessiert. Bitte setzen Sie sich mit mir in Verbindung, wenn Sie sich für diese Themen interessieren.

Preise und Auszeichnungen
2014 IEEE Circuits and Systems - Darlington Best Paper Award
2011 Best Student Paper Award, 20th European Conference on Circuit Theory and Design, Linköping (Schweden)
2009 Outstanding Paper Award, 16th International Conference Mixed Design of Integrated Circuits and Systems, Lodz (Polen)
2009 IEEE Circuits and Systems Society Outstanding Young Author Award, Co-author
2007 IEEE UK/RI Best Paper Award, The 6th Symposium on Communication Systems, Networks and Digital Signal Processing, Graz (Österreich)


Aktuelle Veröffentlichungen
Eine aktuelle Publikationsliste finden Sie auf meinem Google Scholar Profil.
Aktuelle Forschnugsergebisse und Projekte finden sie auf meinem ResearchGate Profil.

F. Mayer and C. Vogel, "An Optimization-Based Approach to One-Bit Quantization," 2024 IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, Singapore, 2024, pp. 1-5, doi: 10.1109/ISCAS58744.2024.10558238.

X. Li, C. Vogel and J. Wu, "Two-Stage Difference-Based Estimation Method for Timing Skew in TI-ADCs," 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, pp. 1-4, doi: 10.1109/ISCAS51556.2021.9401240.

X. Li, J. Wu, and C. Vogel, “A background correlation-based timing skew estimation method for time-interleaved ADCs,” IEEE Access, vol. 9, pp. 45 730–45 739, 2021. [Online]. Available: https://dx.doi.org/10.1109/ACCESS.2021.3067355

H. Berger, C. Netzberger, W. Stocksreiter, R. Estrada-Vazquez, Blasonig, A. Preda, W. Obermayr, M. Salloker, and C. Vogel, Kompetenzfelder der Elektronik–Systemlösungen des Instituts Electronic Engineering der FH JOANNEUM,” e&i Elektrotechnik und Informationstechnik, vol. 137, no. 1, pp. 11–18, 2020. [Online]. Available: https://doi.org/10.1007/s00502-019-00783-8.

C. Vogel, H. Enzinger, and K. Freiberger, “Digitally enhanced mixed signal systems – the big picture,” in Digitally Enhanced Mixed Signal Systems, C. Jabbour, P. Desgreys, and D. Dallet, Eds. The Institution of Engineering and Technology, 2019, ch. 1, pp. 1–25.

K. Freiberger, H. Enzinger, and C. Vogel, “SLIC EVM-error vector magnitude without demodulation,” in 89th ARFTG Microwave Measurements Symposium (ARFTG), June 2017. [Online]. Available: http://doi.org/10.1109/ARFTG.2017.8000826

H. Enzinger, K. Freiberger, and C. Vogel, “Competitive linearity for envelope tracking: Dual-band crest factor reduction and 2D-vector-switched digital predistortion,” IEEE Microwave Magazine, vol. 19, no. 1, pp. 69–77, 2018. [Online]. Available: http://doi.org/10.1109/MMM.2017.2759618

K. Freiberger, H. Enzinger, and C. Vogel, “The error power ratio estimates EVM for a wide class of impairments: Monte carlo simulations,” in 2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC), April 2017, pp. 1–3. [Online]. Available: http://doi.org/10.1109/INMMIC.2017.7927308

K. Freiberger, H. Enzinger, and C. Vogel, “A noise power ratio measurement method for accurate estimation of the error vector magnitude,” IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 5, pp. 1632–1645, 2017. [Online]. Available: http://doi.org/10.1109/TMTT.2017.2654221

H. Enzinger, K. Freiberger, G. Kubin, and C. Vogel, “Fast time-domain volterra filtering,” in 2016 50th Asilomar Conference on Signals, Systems and Computers, November 2016, pp. 225–228. [Online]. Available: http://dx.doi.org/10.1109/ACSSC.2016.7869029

H. Enzinger, K. Freiberger, G. Kubin, and C. Vogel, “Baseband volterra filters with even-order terms: Theoretical foundation and practical implications,” in 2016 50th Asilomar Conference on Signals, Systems and Computers, November 2016, pp. 220–224. [Online]. Available: http://dx.doi.org/10.1109/ACSSC.2016.7869028

H. Enzinger, K. Freiberger, G. Kubin, and C. Vogel, “A survey of delay and gain correction methods for the indirect learning of digital predistorters,” in 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), December 2016, pp. 285–288. [Online]. Available: http://dx.doi.org/10.1109/ICECS.2016.7841188

H. Enzinger, K. Freiberger, and C. Vogel, “A joint linearity-efficiency model of radio frequency power amplifiers,” in 2016 IEEE International Symposium on Circuits and Systems (ISCAS), May 2016, pp. 281–284. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2016.7527225

H. Enzinger, K. Freiberger, and C. Vogel, “Analysis of even-order terms in memoryless and quasi-memoryless polynomial baseband models,” in Proceedings of the 2015 IEEE International Symposium on Circuits and Systems (ISCAS 2015), May 2015, pp. 1714–1717. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2015.7168983

K. Freiberger, M. Wolkerstorfer, H. Enzinger, , and C. Vogel, “Digital predistorter identification based on constrained multi-objective optimization of WLAN standard performance metrics,” in Proceedings of the 2015 IEEE International Symposium on Circuits and Systems (ISCAS 2015), May 2015, pp. 862–865. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2015.7168770

M. Hotz and C. Vogel, “Block processing with iterative correction filters for time-interleaved ADCs,” in Proceedings of the 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), May 2014, pp. 4961–4965. [Online]. Available: http://dx.doi.org/10.1109/ICASSP.2014.6854539

H. Enzinger and C. Vogel, “Analytical description of multilevel carrier-based PWM of arbitrary bounded input signals,” in Proceedings of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS 2014), June 2014, pp. 1030–1033. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2014.6865314

M. Hotz and C. Vogel, “Linearization of time-varying nonlinear systems using a modified linear iterative method,” IEEE Transactions on Signal Processing, vol. 60, no. 10, pp. 2566–2579, 2014. [Online]. Available: http://dx.doi.org/10.1109/TSP.2014.2311965

B. C. Geiger and C. Vogel, “Influence of Doppler bin width on GPS acquisition probabilities,” IEEE Transactions on Aerospace and Electronic Systems, vol. 49, no. 4, pp. 2570–2584, 2013. [Online]. Available: http://dx.doi.org/10.1109/TAES.2013.6621837

K. Hausmair, P. Singerl, and C. Vogel, “Multiplierless implementation of an aliasing-free digital pulse-width modulator,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 60, no. 9, pp. 592–596, 2013. [Online]. Available: http://dx.doi.org/10.1109/TCSII.2013.2268431

S. Chi, K. Hausmair, and C. Vogel, “Coding efficiency of bandlimited PWM based burst-mode RF transmitters,” in Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS 2013), May 2013, pp. 2263–2266. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2013.6572328

L. Bolliger, H.-A. Loeliger, and C. Vogel, “LMMSE estimation and interpolation of continuous-time signals from discrete-time samples using factor graphs,” CoRR, vol. abs/1301.4793, 2013. [Online]. Available: http://arxiv.org/abs/1301.4793

K. Hausmair, S. Chi, and C. Vogel, “How to reach 100% coding efficiency in multilevel burst-mode RF transmitters,” in Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS 2013), May 2013, pp. 2255–2258. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2013.6572326

S. Chi, P. Singerl, and C. Vogel, “Efficiency optimization for burst-mode multilevel radio frequency transmitters,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 7, pp. 1901–1914, July 2013. [Online]. Available: http://dx.doi.org/10.1109/TCSI.2012.2226487

K. Hausmair, S. Chi, P. Singerl, and C. Vogel, “Aliasing-free digital pulse-width modulation for burst-mode RF transmitters,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 2, pp. 415–427, February 2013. [Online]. Available: http://dx.doi.org/10.1109/TCSI.2012.2215776

L. Bernadó, T. Zemen, N. Czink, P. Fuxjäger, F. A. Sánchez, V. Shivaldova, C. F. Mecklenbräuker, A. Paier, D. Smely, M. Jandrisits, B. Rainer, and C. Vogel, “Wireless communications for intelligent transportation systems,” in 19th ITS World Congress, Vienna, Austria, October 2012.

C. Vogel, M. Hotz, S. Saleem, K. Hausmair, and M. Soudan, “A review on low-complexity structures and algorithms for the correction of mismatch errors in time-interleaved ADCs,” in 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS), June 2012, pp. 349–352. [Online]. Available: http://dx.doi.org/10.1109/NEWCAS.2012.6329028

M. Soudan and C. Vogel, “Correction structures for linear weakly time-varying systems,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 9, pp. 2075–2084, September 2012. [Online]. Available: http://dx.doi.org/10.1109/TCSI.2012.2185308

B. C. Geiger, C. Vogel, and M. Soudan, “Comparison between ratio detection and threshold comparison for GNSS acquisition,” IEEE Transactions on Aerospace and Electronic Systems, vol. 48, no. 2, pp. 1772–1779, April 2012. [Online]. Available: http://dx.doi.org/10.1109/TAES.2012.6178098

T. Zemen, N. Czink, L. Bernadó, and C. Vogel, “Funkkommunikation für intelligente Verkehrssysteme – Status und Ausblick,” e&i – Elektrotechnik und Informationstechnik, vol. 128, no. 7-8, pp. 276–281, August 2011. [Online]. Available: http://dx.doi.org/10.1007/s00502-011-0016-6

M. Soudan and C. Vogel, “Low complexity least-squares filter design for the correction of linear time-varying systems,” in The 20th European Conference on Circuit Theory and Design (ECCTD 2011), August 2011, pp. 690–693. [Online]. Available: http://dx.doi.org/10.1109/ECCTD.2011.6043631

M. Soudan and C. Vogel, “On the correction of linear time-varying systems by means of time-varying FIR filters,” in The 54th International Midwest Symposium on Circuits and Systems (IEEE MWSCAS 2011), July 2011. [Online]. Available: http://dx.doi.org/10.1109/MWSCAS.2011.6026377

S. Chi, P. Singerl, and C. Vogel, “Coding efficiency optimization for multilevel PWM based switched-mode RF transmitters,” in The 54th International Midwest Symposium on Circuits and Systems (IEEE MWSCAS 2011), July 2011. [Online]. Available: http://dx.doi.org/10.1109/MWSCAS.2011.6026539

S. Saleem and C. Vogel, “Adaptive blind background calibration of polynomial-represented frequency response mismatches in a two- channel time-interleaved ADC,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 6, pp. 1300–1310, June 2011. [Online]. Available: http://dx.doi.org/10.1109/TCSI.2010.2094330

S. Chi, C. Vogel, and P. Singerl, “The frequency spectrum of polar modulated PWM signals and the image problem,” in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010), December 2010, pp. 685–688. [Online]. Available: http://dx.doi.org/10.1109/ICECS.2010.5724603

P. Berglez, J. Seybold, B. C. Geiger, M. Soudan, C. Vogel, C. Abart, A. P. Singh, and B. Hofmann-Wellenhof, “Development of a dual frequency software-based GNSS receiver,” in Proceedings of the ION GNSS 2010 program, September 2010.

B. C. Geiger, M. Soudan, and C. Vogel, “On the detection probability of parallel code phase search algorithms in GPS Receivers,” in Proceedings of the The 21th Personal, Indoor and Mobile Radio Conference (PIMRC), September 2010, pp. 864–869. [Online]. Available: http://dx.doi.org/10.1109/PIMRC.2010.5672040

S. Saleem and C. Vogel, “On blind identification of gain and timing mismatches in time-interleaved analog-to-digital converters,” in Proceedings of 33rd International Conference on Telecommunications and Signal Processing (TSP 2010), August 2010, pp. 151–155.

S. Saleem and C. Vogel, “Adaptive compensation of frequency response mismatches in high-resolution time-interleaved ADCs using a low-resolution ADC and a time-varying filter,” in Proceedings of the 2010 IEEE International Symposium on Circuits and Systems, May 2010, pp. 561–564. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2010.5537536

L. Bolliger, H.-A. Loeliger, and C. Vogel, “Simulation, MMSE estimation, and interpolation of sampled continuous-time signals using factor graphs,” in 2010 Information Theory and Applications Workshop, January 2010. [Online]. Available: http://dx.doi.org/10.1109/ITA.2010.5454111

C. Vogel, “A signal processing view on time-interleaved ADCs,” in Analog Circuit Design, A. H. M. Roermund, H. Casier, and M. Steyaert, Eds., 2010, ch. 4, pp. 61–78. [Online]. Available: http://dx.doi.org/10.1007/978-90-481-3083-2 4

F. Dielacher, C. Vogel, P. Singerl, S. Mendel, and A. Wiesbauer, “A holistic design approach for systems on chip,” in IEEE International SOC Conference, 2009. SOCC 2009., September 2009, pp. 301–306. Available: http://dx.doi.org/10.1109/SOCCON.2009.5398035

C. Vogel, S. Mendel, P. Singerl, and F. Dielacher, “Digital signal processing for data converters in mixed-signal systems,” e&i – Elektrotechnik und Informationstechnik, vol. 126, no. 11, pp. 390–395, November 2009. [Online]. Available: http://dx.doi.org/10.1007/s00502-009-0689-2

S. Mendel, C. Vogel, and N. D. Dalt, “A phase-domain all-digital phase-locked loop architecture without reference clock retiming,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 56, no. 11, pp. 860–864, November 2009. [Online]. Available: http://dx.doi.org/10.1109/TCSII.2009.2034079

C. Vogel and S. Mendel, “A flexible and scalable structure to compensate frequency response mismatches in time-interleaved ADCs,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, no. 11, pp. 2463–2475, November 2009. [Online]. Available: http://dx.doi.org/10.1109/TCSI.2009.2015595

C. Vogel and C. Krall, “Digital compensation of in-band image signals caused by m-periodic nonuniform zero-order hold signals,” Ubiquitous Computing and Communication Journal (UBICC), Special Issue CSNDSP 2008, September 2009.

S. Mendel, C. Vogel, and N. D. Dalt, “Signal and timing analysis of a phase-domain all-digital phase-locked loop with reference retiming mechanism,” in 16th International Conference on Mixed Design of Integrated Circuits and Systems, June 2009, pp. 681–687.

H. Johansson and C. Vogel, “Efficient design and implementation of sampling rate conversion, resampling, and signal reconstruction,” in Proceedings of the 8th international conference on Sampling Theory and Applications (SampTA 2009), May 2009.

C. Vogel, “A signal processing view on time-interleaved ADCs,” in Proceedings of the 18th Workshop on Advances in Analog Circuit Design (AACD 2009), April 2009, pp. 61–80.

S. Tertinek and C. Vogel, “Reconstruction of nonuniformly sampled bandlimited signals using a differentiator-multiplier cascade,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 55, no. 8, pp. 2273–2286, September 2008. [Online]. Available: http://dx.doi.org/10.1109/TCSI.2008.918267

B. Murmann, C. Vogel, and H. Koeppl, “Digitally enhanced analog circuits: System aspects,” in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008., 2008, pp. 560–563. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2008.4541479

C. Vogel and C. Krall, “Compensation of distortions caused by periodic nonuniform holding signals,” in 6th International Symposium on Communication Systems, Networks and Digital Signal Processing, 2008. CNSDSP 2008., 2008, pp. 152–155. [Online]. Available: http://dx.doi.org/10.1109/CSNDSP.2008.4610774

C. Vogel, S. Saleem, and S. Mendel, “Adaptive blind compensation of gain and timing mismatches in M-channel time-interleaved ADCs,” in 15th IEEE International Conference on Electronics, Circuits and Systems, 2008. ICECS 2008., 2008, pp. 49–52. [Online]. Available: http://dx.doi.org/10.1109/ICECS.2008.4674788

C. Vogel, “Compensation of two-periodic nonuniform holding signal distortions by using a variable FIR filter,” in International Conference on Signals and Electronic Systems, 2008. ICSES’08., September 2008, pp. 323–326. [Online]. Available: http://dx.doi.org/10.1109/ICSES.2008.4673427

S. Mendel and C. Vogel, “Improved lock-time in all-digital phase-locked loops due to binary search acquisition,” in 15th IEEE International Conference on Electronics, Circuits and Systems, 2008. ICECS 2008., September 2008, pp. 384–387. [Online]. Available: http://dx.doi.org/10.1109/ICECS.2008.4674871

S. Tertinek and C. Vogel, “Reconstruction of two-periodic nonuniformly sampled band-limited signals using a discrete-time differentiator and a time-varying multiplier,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 54, no. 7, pp. 616–620, July 2007. [Online]. Available: http://dx.doi.org/10.1109/TCSII.2007.896801

S. Saleem and C. Vogel, “LMS-based identification and compensation of timing mismatches in a two-channel time-interleaved analog-to-digital converter,” in Proceedings of the IEEE Norchip Conference 2007, November 2007. [Online]. Available: http://dx.doi.org/10.1109/NORCHP.2007.4481041

S. Mendel and C. Vogel, “A z-domain model and analysis of phase-domain all-digital phase-locked loops,” in Proceedings of the IEEE Norchip Conference 2007, November 2007. [Online]. Available: http://dx.doi.org/10.1109/NORCHP.2007.4481030

C. Krall, C. Vogel, and K. Witrisal, “Time-interleaved digital-to-analog converters for uwb signal generation,” in IEEE International Conference on Ultra-Wideband, 2007. ICUWB 2007., September 2007, pp. 366–371. [Online]. Available: http://dx.doi.org/10.1109/ICUWB.2007.4380971

S. Mendel and C. Vogel, “On the compensation of magnitude response mismatches in M-channel time-interleaved ADCs,” in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007., May 2007, pp. 3375–3378. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2007.378291

C. Vogel, “A frequency domain method for blind identification of timing mismatches in time-interleaved ADCs,” in Proceedings of the 24th IEEE Norchip Conference 2006, November 2006, pp. 45–48. [Online]. Available: http://dx.doi.org/10.1109/NORCHP.2006.329241

C. Vogel and H. Johansson, “Time-interleaved analog-to-digital converters: status and future directions,” in 2006 IEEE International Symposium on Circuits and Systems, 2006. ISCAS 2006. Proceedings., May 2006, pp. 3386–3389. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2006.1693352

S. Mendel and C. Vogel, “A compensation method for magnitude response mismatches in two-channel time-interleaved analog-to-digital converters,” in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS ’06., December 2006, pp. 712–715. [Online]. Available: http://dx.doi.org/10.1109/ICECS.2006.379888

C. Vogel, “Modeling, identification, and compensation of channel mismatch errors in time-interleaved analog-to-digital converters,” Ph.D. dissertation, Graz University of Technology, Austria, 2005. [Online]. Available: http://theses.eurasip.org/media/theses/documents/vogel-christian-modeling-identification-and-compensation-of-channel-mismatch-errors-in-time-interleaved-analog-to-digital-converters.pdf

C.Vogel, “The impact of combined channel mismatch effects in time-interleaved ADCs,” IEEE Transactions on Instrumentation and Measurement, vol. 54, no. 1, pp. 415–427, February 2005. [Online]. Available: http://dx.doi.org/10.1109/TIM.2004.834046

C. Vogel and G. Kubin, “Modeling of time-interleaved ADCs with nonlinear hybrid filter banks,” AEU - International Journal of Electronics and Communications, vol. 59, no. 5, pp. 288–296, July 2005. [Online]. Available: http://dx.doi.org/10.1016/j.aeue.2005.05.008

C. Vogel, V. Pammer, and G. Kubin, “A novel channel randomization method for time-interleaved ADCs,” in Proceedings of the IEEE Instrumentation and Measurement Technology Conference, 2005. IMTC 2005., vol. 1, May 2005, pp. 150–155. [Online]. Available: http://dx.doi.org/10.1109/IMTC.2005.1604089

C. Vogel, D. Draxelmayr, and G. Kubin, “Spectral shaping of timing mismatches in time-interleaved analog-to-digital converters,” in IEEE International Symposium on Circuits and Systems, 2005. ISCAS 2005., vol. 2, May 2005, pp. 1394–1397. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2005.1464857

P. Singerl and C. Vogel, “A fast and accurate automatic gain control for a wireless local area network receiver,” in Proceedings of 2005 Global Mobile Congress (GMC 2005), October 2005, pp. 34–38.
C. Vogel and G. Kubin, “Time-interleaved ADCs in the context of hybrid filter banks,” in Proceedings of the 2004 URSI International Symposium on Signals, Systems, and Electronics. ISSSE 2004., August 2004, pp. 214–217.

P. Singerl and C. Vogel, “An analysis of a low complexity received signal strength indicator for wireless applications,” in Proceedings of the Austrochip 2004, October 2004, pp. 57–60.

C. Vogel and G. Kubin, “Analysis and compensation of nonlinearity mismatches in time-interleaved ADC arrays,” in Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS ’04., vol. 1, May 2004, pp. 593–596. [Online]. Available: http://dx.doi.org/10.1109/ISCAS.2004.1328264

C. Vogel, D. Draxelmayr, and F. Kuttner, “Compensation of timing mismatches in time-interleaved analog-to-digital converters through transfer characteristics tuning,” in The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS’04., vol. 1, July 2004, pp. 341–344. [Online]. Available: http://dx.doi.org/10.1109/MWSCAS.2004.1353997

C. Vogel and H. Koeppl, “Behavioral modeling of time-interleaved ADCs using MATLAB,” in Proceedings of the Austrochip 2003, October 2003, pp. 45–48.

C. Vogel, “Comprehensive error analysis of combined channel mismatch effects in time-interleaved ADCs,” in Proceedings of the 20th IEEE Instrumentation and Measurement Technology Conference. IMTC ’03., vol. 1, May 2003, pp. 733–738. [Online]. Available: http://dx.doi.org/10.1109/TIM.2004.830787

Patente
C. Vogel and P. Singerl, “System and method for generating a pulse-width modulated signal,” Patent US 8878622 B2, November 4, 2014. [Online]. Available: http://www.google.com/patents/US20120256697

S. Mendel and C. Vogel, “Frequency to phase converter with uniform sampling for all digital phase locked loops,” patent application US 2010074387 A1, March 25, 2010. [Online]. Available: https://www.google.com/patents/US20100074387

C. Vogel, D. Draxelmayr, and G. Kubin, “Analog-to-digital converter operable with staggered timing,” Patent US 7501967 B2, March 10, 2009. [Online]. Available: http://www.google.com/patents/US7501967

C. Vogel and D. Draxelmayr, “System for reconstruction of non-uniformly sampled signals,” Patent US 7403875 B2, July 22, 2008. [Online]. Available: http://www.google.com/patents/US7403875

D. Draxelmayr, F. Kuttner, and C. Vogel, “Verfahren und Schaltungsanordnung zum Verzögerungsabgleich von zeitversetzt arbeitenden Analog-Digital-Wandlern,” Patent DE102004009612 B4, November 18, 2010. [Online]. Available: http://www.google.com/patents/DE102004009612B4

D. Draxelmayr, F. Kuttner, and C. Vogel, “Circuit arrangement for the delay adjustment of analog-to-digital converters operating in a temporally offset manner,” Patent US 7126511 B2, October 24, 2006. [Online]. Available: http://www.google.com/patents/US7126511

D. Draxelmayr, F. Kuttner, and C. Vogel, “Schaltungsanordnung zum Kompensieren von Nichtlinearitäten von zeitversetzt arbeitenden Analog-Digital-Wandlern,” Patent DE102004009613 B4, May 12, 2010. [Online]. Available: http://www.google.com/patents/DE102004009613B4

F. Kuttner, C. Vogel, and D. Draxelmayr, “Circuit arrangement for compensation for nonlinearities from analog/digital converters operating with different timing,” Patent US 7135999 B2, November 14, 2006. [Online]. Available: http://www.google.com/patents/US7135999